A display device includes: a gate line (GL); a semiconductor pattern (SP) on the GL; a data line (DL); a voltage division reference line (VDRL); and first to third switching elements (SWE) overlapping the SP. The first SWE includes a first source electrode (SE) connected to the DL, a first drain electrode (DE) spaced apart from the first SE, and a first gate electrode (GE) connected to the GL. The second SWE includes a second SE connected to the DL, a second DE spaced apart from the second SE, and a second GE connected to the GL. The third SWE includes a third SE connected to the VDRL, a third DE connected to the second SE, and a third GE connected to the GL. The first SE, the first DE, the second SE, and the second DE are sequentially arranged across and on the SP in a first direction.