A structure of memory device is provided. The structure of memory device includes a first gate structure, disposed on a substrate, wherein the first gate structure is for storing charges. In addition, a second gate structure is disposed on the substrate. An insulating layer is in contact between the first gate structure and the second gate structure. An isolation structure integrated with the insulating layer is between the first gate structure and the second gate structure and at a top portion of the first gate structure and the second gate structure. The isolation structure provides an isolation distance between the first gate structure and the second gate structure.