Invention Grant
- Patent Title: Interlayer dielectric for non-planar transistors
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Application No.: US16877355Application Date: 2020-05-18
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Publication No.: US10998445B2Publication Date: 2021-05-04
- Inventor: Sameer S. Pradhan , Jeanne L. Luce
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/02 ; H01L21/768 ; H01L21/8234
Abstract:
The present description relates the formation of a first level interlayer dielectric material layer within a non-planar transistor, which may be formed by a spin-on coating technique followed by oxidation and annealing. The first level interlayer dielectric material layer may be substantially void free and may exert a tensile strain on the source/drain regions of the non-planar transistor.
Public/Granted literature
- US20200279950A1 INTERLAYER DIELECTRIC FOR NON-PLANAR TRANSISTORS Public/Granted day:2020-09-03
Information query
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