Invention Grant
- Patent Title: Low power content addressable memory
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Application No.: US15390500Application Date: 2016-12-25
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Publication No.: US11017858B1Publication Date: 2021-05-25
- Inventor: Sudarshan Kumar
- Applicant: Sudarshan Kumar
- Applicant Address: US CA Fremont
- Assignee: Sudarshan Kumar
- Current Assignee: Sudarshan Kumar
- Current Assignee Address: US CA Fremont
- Agency: Haynes and Boone, LLP
- Agent Philip H. Albert
- Main IPC: G11C15/04
- IPC: G11C15/04

Abstract:
A CAM/TCAM includes a plurality of rows of CAM/TCAM lines, a plurality of search lines, and a plurality of bit lines, wherein each row comprises an array of CAM/TCAM cells. Each TCAM cell has two storage cells, representing state for data and a mask of the cell, and match logic. The two storage cells connect to a respective bit line as input and their output drives the match logic. In response to the respective search line and storage outputs, the match logic generates cell match outputs. The match logic can be implemented using static logic comprising tristate gates and masking logic that forces the cell match output to a predetermined value in response to the stored mask value. The match outputs in the row are AND-ed by a logic tree to generate a match output, thereby reducing power consumption.
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