Invention Grant
- Patent Title: Interposer, semiconductor package, and method of fabricating interposer
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Application No.: US16699283Application Date: 2019-11-29
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Publication No.: US11018026B2Publication Date: 2021-05-25
- Inventor: Un-Byoung Kang , Tae-Je Cho , Hyuek-Jae Lee , Cha-Jea Jo
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: F.Chau & Associates, LLC
- Priority: KR10-2016-0058234 20160512
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/18 ; H01L21/48 ; H05K3/46 ; C23C18/00 ; H01L23/433 ; H01L23/498 ; B05D1/00 ; B05D1/32 ; B05D1/38 ; B05D3/02 ; B05D7/00 ; C23C14/02 ; C23C14/04 ; C23C14/06 ; C23C14/20 ; C23C14/34 ; C23C14/58 ; C23C18/38 ; H01L23/00 ; H01L25/03 ; H01L23/473 ; H01L23/538 ; H01L25/065 ; H05K1/14

Abstract:
A semiconductor package includes: a plurality of unit redistribution layers vertically stacked, each including: a first polymer layer having a first via hole pattern; a second polymer layer formed on the first polymer layer, and having a redistribution pattern on the first polymer layer and a second via hole pattern in the first via hole pattern; a seed layer covering sidewalls and bottom surfaces of the redistribution pattern and the second via hole pattern; a conductive via plug formed in the second via hole pattern; and a conductive redistribution line formed in the redistribution pattern; a connection terminal disposed on a bottom surface of a lowermost unit redistribution layer and electrically connected to the conductive via plug; a semiconductor device mounted on the unit redistribution layers with a conductive terminal interposed therebetween. Upper surfaces of the second polymer layer, the conductive redistribution line and the conductive via plug are substantially coplanar.
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