A semiconductor device includes a first interlayer insulating film on a substrate, a via which penetrates the first interlayer insulating film, a first etching stop film which extends along an upper surface of the first interlayer insulating film, a second interlayer insulating film on the first etching stop film, the second interlayer insulating film including a plurality of periodically arranged air gaps, a first wiring pattern in the second interlayer insulating film, the first wiring pattern penetrating the first etching stop film and is connected to the via, and a capping film which covers an upper surface of the second interlayer insulating film and an upper surface of the first wiring pattern, each of the plurality of air gaps in the second interlayer insulating film extending from the first etching stop film to the capping film.