Invention Grant
- Patent Title: Memory management apparatus and memory management method
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Application No.: US16742811Application Date: 2020-01-14
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Publication No.: US11042308B2Publication Date: 2021-06-22
- Inventor: Wei-Chen Wang , Ping-Hsien Lin , Tse-Yuan Wang , Yuan-Hao Chang , Tei-Wei Kuo
- Applicant: MACRONIX International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F16/901 ; G06F12/10

Abstract:
A memory management method includes: performing a bloom filtering operation on a plurality of logic block addresses to determine a read and written frequency of each of the logic block addresses; setting a first program/erase (P/E) cycle threshold and a second P/E cycle threshold value, wherein the first P/E cycle threshold value is smaller than the second P/E cycle threshold value; dividing each of physical memory blocks into a first type memory block, a second type memory block or a third type memory block according to the first P/E cycle threshold value and the second P/E cycle threshold value; and, allocating each of the logic block addresses to the first type memory block, the second type memory block or the third type memory block according to the read and written frequency of corresponding logic block addresses.
Public/Granted literature
- US20200319803A1 MEMORY MANAGEMENT APPARATUS AND MEMORY MANAGEMENT METHOD Public/Granted day:2020-10-08
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