A decoder structure for selecting a column of memory cells in a memory architecture includes an array of decoder cells organized into different rows. Each row includes a plurality of sub-column groups of decoder cells configured to receive a same input signal. Each sub-column group of decoder cells of a row is coupled to a sub-column group of decoder cells of a subsequent row. The decoder structure further includes a plurality of precharge transistors connected to the decoder cells of a row so as to form a plurality of inverter blocks.