Invention Grant
- Patent Title: Die to die interconnect structure for modularized integrated circuit devices
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Application No.: US16368696Application Date: 2019-03-28
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Publication No.: US11062070B2Publication Date: 2021-07-13
- Inventor: Lai Guan Tang , Chee Hak Teh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Fletcher Yoder P.C.
- Main IPC: G06F30/34
- IPC: G06F30/34 ; H01L25/18 ; H01L23/00 ; G06F13/20 ; H04J3/02 ; G06F115/08

Abstract:
Systems or methods of the present disclosure may facilitate meeting connectivity demands between the dies of the modularized integrated circuits. Such an integrated circuit system may include a first die of programmable fabric circuitry that is communicatively coupled to a second die of modular periphery intellectual property (IP) tile via a modular interface. The modular interface may enable communication between a first microbump of the first die and a second microbump of the second die using a time-division multiplexing (TDM) technique. The modular interface may also enable communication between the first microbump and the second microbump using a wire-to-wire connection that does not comprise the TDM technique.
Public/Granted literature
- US20190220566A1 DIE TO DIE INTERCONNECT STRUCTURE FOR MODULARIZED INTEGRATED CIRCUIT DEVICES Public/Granted day:2019-07-18
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