Invention Grant
- Patent Title: Method of fabricating semiconductor devices using a two-step gap-fill process
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Application No.: US16746258Application Date: 2020-01-17
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Publication No.: US11063218B2Publication Date: 2021-07-13
- Inventor: Jaeho Jung , Youngmin Ko , Jonguk Kim , Kwangmin Park , Dongsung Choi
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Lee IP Law, PC
- Priority: KR10-2019-0098185 20190812
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L45/00 ; H01L27/24

Abstract:
A method of fabricating a memory device includes forming word lines and cell stacks with gaps between the cell stacks, forming a lower gap-fill insulator in the gaps, forming an upper gap-fill insulator on the lower gap-fill insulator, curing the lower gap-fill insulator and the upper gap-fill insulator to form a gap-fill insulator, and forming bit lines on the cell stacks and the gap-fill insulator. The lower gap-fill process may be performed using a first source gas that includes first and second precursors, and the upper gap-fill process may be performed using a second source gas that includes the first and second precursors, a volume ratio of the first precursor to the second precursor in the first source gas may be greater than 15:1, and a volume ratio of the first precursor to the second precursor in the second source gas may be less than 15:1.
Public/Granted literature
- US20210050522A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICES USING A TWO-STEP GAP-FILL PROCESS Public/Granted day:2021-02-18
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