- 专利标题: Block acknowledgement and fragmentation in multi-link communication between multi-link logical entities
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申请号: US16537028申请日: 2019-08-09
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公开(公告)号: US11076385B2公开(公告)日: 2021-07-27
- 发明人: Po-Kai Huang , Robert J. Stacey , Daniel F. Bravo , Laurent Cariou , Arik Klein , Danny Ben-Ari , Ofer Schreiber , Shahrnaz Azizi , Thomas J. Kenney , Alexander W. Min , Yaron Alpert , Avi Mansour , Dave A. Cavalcanti , Jing Zhu , Ziv Avital , Xiaogang Chen , Juan Fang
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwegman Lundberg & Woessner, P.A.
- 主分类号: H04W72/00
- IPC分类号: H04W72/00 ; H04L5/00 ; H04L29/12
摘要:
Embodiments of a station (STA) and method of communication are generally described herein. The STA may be included in a first plurality of STAs affiliated with a first multi-link logical entity (MLLE). A plurality of links may be established between the first MLLE and a second MLLE, wherein the second MLLE may be affiliated with a second plurality of STAs. The STA may receive a first subset of a sequence of MAC protocol data units (MPDUs). A second subset of the sequence of MPDUs may be transmitted by another STA of the first plurality of STAs. The STA may transmit a block acknowledgement (BA) frame that includes: a number of BA bitmaps, configurable to values greater than or equal to one; and BA control information for each of the BA bitmaps.
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