- 专利标题: System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability
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申请号: US15148700申请日: 2016-05-06
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公开(公告)号: US11115022B2公开(公告)日: 2021-09-07
- 发明人: Jie Gu
- 申请人: Northwestern University
- 申请人地址: US IL Evanston
- 专利权人: Northwestern University
- 当前专利权人: Northwestern University
- 当前专利权人地址: US IL Evanston
- 代理机构: Benesch, Friedlander, Coplan & Aronoff LLP
- 主分类号: G06F1/26
- IPC分类号: G06F1/26 ; H03K3/03 ; H03K5/24 ; H03K19/0175 ; H03K3/356
摘要:
An accelerated aging circuit is described to shorten the required stress time to a few seconds of operation. Due to the challenges posed by process variation in advanced CMOS technology, a stochastic processing methodology is also described to reduce the failure rate of the tracking and detection. Combining both circuit and system level acceleration, the creation of a silicon marker can be realized within seconds of usage in contrast with days of operation from previously reported aging monitor.
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