- 专利标题: Signal generation circuit synchronized with a clock signal and a semiconductor apparatus using the same
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申请号: US17006309申请日: 2020-08-28
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公开(公告)号: US11126216B2公开(公告)日: 2021-09-21
- 发明人: Seung Wook Oh , Young Hoon Kim
- 申请人: SK hynix Inc.
- 申请人地址: KR Icheon-si
- 专利权人: SK hynix Inc.
- 当前专利权人: SK hynix Inc.
- 当前专利权人地址: KR Icheon-si
- 代理机构: William Park & Associates Ltd.
- 优先权: KR10-2019-0005213 20190115
- 主分类号: G06F1/10
- IPC分类号: G06F1/10 ; H03K5/01 ; H03K3/017 ; H03K19/20
摘要:
A signal driver includes a first driver, a second driver, an on-timing control circuit, and an off-timing control circuit. The first driver is configured to generate a first driving pulse signal by inverting and driving an input pulse signal. The second driver is configured to generate a second driving pulse signal by inverting and driving the first driving pulse signal. The on-timing control circuit is configured to pull-up drive or pull-down drive the first driving pulse signal based on a first on-timing control signal, a second on-timing control signal, and the input pulse signal. The off-timing control circuit is configured to pull-up drive or pull-down drive the second driving pulse signal based on a first off-timing control signal, a second off-timing control signal, and the first driving pulse signal.
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