Invention Grant
- Patent Title: Source and drain process for FinFET
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Application No.: US16725975Application Date: 2019-12-23
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Publication No.: US11127586B2Publication Date: 2021-09-21
- Inventor: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/78 ; H01L29/66 ; H01L21/306 ; H01L29/06

Abstract:
A method includes forming a dielectric layer over a fin structure, forming a dummy gate crossing over the dielectric layer, forming a spacer on a sidewall of the dummy gate, etching the dielectric layer and the fin structure, such that the dielectric layer and the fin structure are recessed from an outer sidewall of the spacer, and etching the fin structure, such that the fin structure is recessed from an end surface of the dielectric layer.
Information query
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