Source and drain process for FinFET
Abstract:
A method includes forming a dielectric layer over a fin structure, forming a dummy gate crossing over the dielectric layer, forming a spacer on a sidewall of the dummy gate, etching the dielectric layer and the fin structure, such that the dielectric layer and the fin structure are recessed from an outer sidewall of the spacer, and etching the fin structure, such that the fin structure is recessed from an end surface of the dielectric layer.
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