Invention Grant
- Patent Title: Memory device having memory cell and current detection circuit
-
Application No.: US16816900Application Date: 2020-03-12
-
Publication No.: US11139039B2Publication Date: 2021-10-05
- Inventor: Tomonori Kurosawa , Dai Nakamura
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JPJP2019-150363 20190820
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/24 ; G11C16/08 ; G11C16/04

Abstract:
According to one embodiment, a memory device includes a memory cell, a word line connected to the memory cell, a word line driver which generates a selection signal for the word line, a first transistor including a gate to which the selection signal generated by the word line driver is input, and a drain which supplies a signal based on the selection signal to the word line, and a detection circuit which detects a value based on a current flowing through the first transistor during a verification period after writing data to the memory cell.
Public/Granted literature
- US20210057032A1 MEMORY DEVICE Public/Granted day:2021-02-25
Information query