A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.