Invention Grant
- Patent Title: Multi-threshold gate structure with doped gate dielectric layer
-
Application No.: US16585267Application Date: 2019-09-27
-
Publication No.: US11145653B2Publication Date: 2021-10-12
- Inventor: Chung-Liang Cheng , I-Ming Chang , Ziwei Fang , Huang-Lin Chao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/78 ; H01L21/02 ; H01L29/66

Abstract:
The present disclosure describes a semiconductor device that includes a semiconductor device that includes a first transistor having a first gate structure. The first gate structure includes a first gate dielectric layer doped with a first dopant at a first dopant concentration and a first work function layer on the first gate dielectric layer. The first gate structure also includes a first gate electrode on the first work function layer. The semiconductor device also includes a second transistor having a second gate structure, where the second gate structure includes a second gate dielectric layer doped with a second dopant at a second dopant concentration lower than the first dopant concentration. The second gate structure also includes a second work function layer on the second gate dielectric layer and a second gate electrode on the second work function layer.
Public/Granted literature
- US11177259B2 Multi-threshold gate structure with doped gate dielectric layer Public/Granted day:2021-11-16
Information query
IPC分类: