Deterministic optimization via performance tracking in a data storage system
Abstract:
A semiconductor data storage memory can receive data access commands into a queue in a first time sequence that correspond with the transfer of data between a host and portions of the memory. The memory may be divided into separate portions that each have a different owner and the access commands may be issued to each of the respective separate portions. The access commands can subsequently be executed in a different, second time sequence responsive to estimated completion times for each of the access commands based on measured completion times for previously serviced, similar commands to maintain a nominally consistent quality of service level for each of the respective owners.
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