- Patent Title: Device, system and process for redundant processor error detection
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Application No.: US16823180Application Date: 2020-03-18
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Publication No.: US11176012B2Publication Date: 2021-11-16
- Inventor: Emre Ozer , Xabier Iturbe , Balaji Venu
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Berkeley Law & Technology Group, LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/27 ; G06F11/22 ; G06F11/16

Abstract:
Briefly, example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, to determine indicators of potential errors in a multi-processing core lockstep computing device comprising a plurality of processing cores, based, at least in part, on observations of output signals generated by at least two processing cores of the plurality of processing cores. A built-in self-test (BIST) procedure may then be based, at least in part, on the determining indicators.
Public/Granted literature
- US20200218625A1 DEVICE, SYSTEM AND PROCESS FOR REDUNDANT PROCESSOR ERROR DETECTION Public/Granted day:2020-07-09
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