Invention Grant
- Patent Title: Substrate treatment apparatus and manufacturing method of semiconductor device
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Application No.: US16567269Application Date: 2019-09-11
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Publication No.: US11189489B2Publication Date: 2021-11-30
- Inventor: Masayuki Kitamura , Takayuki Beppu , Tomotaka Ariga
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPJP2019-047313 20190314
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/67 ; C23C16/44 ; C23C16/455 ; C23C16/14 ; H01L21/306 ; H01L21/285

Abstract:
In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.
Public/Granted literature
- US20200294793A1 SUBSTRATE TREATMENT APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2020-09-17
Information query
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