A semiconductor device includes a substrate including an active region extending in a first direction; a gate structure intersecting the active region and extending in a second direction on the substrate, the gate structure including a gate electrode, a gate capping layer on the gate electrode, and a plurality of spacers on side surfaces of the gate electrode; source/drain regions on the active region on at least one side of the gate structure; a first insulating layer and a second insulating layer on the source/drain regions on at least one side of the gate structure; and contact plugs on the source/drain regions and penetrating the first and second insulating layers. The plurality of spacers include a first spacer on the side surfaces of the gate electrode, an air-gap spacer on an external side surface of the first spacer, and a second spacer on an external side surface of the air-gap spacer An upper portion of the second spacer is bent towards an upper portion of the first spacer and is configured to cap the air-gap spacer.