Invention Grant
- Patent Title: Epitaxial growth constrained by a template
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Application No.: US16821228Application Date: 2020-03-17
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Publication No.: US11195715B2Publication Date: 2021-12-07
- Inventor: Siva P. Adusumilli , Cameron Luce , Ramsey Hazbun , Mark Levy , Anthony K. Stamper , Alvin J. Joseph
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Thompson Hine LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/762 ; H01L21/324

Abstract:
Methods of forming structures with electrical isolation. A dielectric layer is formed over a semiconductor substrate, openings are patterned in the dielectric layer that extend to the semiconductor substrate, and a semiconductor material is epitaxially grown from portions of the semiconductor substrate that are respectively exposed inside the openings. The semiconductor material, during growth, defines a semiconductor layer that includes first portions respectively coincident with the openings and second portions that laterally grow from the first portions to merge over a top surface of the dielectric layer. A modified layer containing a trap-rich semiconductor material is formed in the semiconductor substrate.
Public/Granted literature
- US20210296122A1 EPITAXIAL GROWTH CONSTRAINED BY A TEMPLATE Public/Granted day:2021-09-23
Information query
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