Invention Grant
- Patent Title: Stacked dies electrically connected to a package substrate by lead terminals
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Application No.: US16942715Application Date: 2020-07-29
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Publication No.: US11227818B2Publication Date: 2022-01-18
- Inventor: Wing Keung Lam , Saravuth Sirinorakul , Kok Chuen Lock , Roel Adeva Robles
- Applicant: UTAC Headquarters Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UTAC Headquarters Pte. Ltd.
- Current Assignee: UTAC Headquarters Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP Pte Ltd.
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/48 ; H01L21/00 ; H01R9/00 ; H05K7/00 ; H05K7/18 ; H01L23/31 ; H01L21/56 ; H01L21/48 ; H01L25/16 ; H01L23/00 ; H01L23/498
Abstract:
An embodiment related to a stacked package is disclosed. The stacked package includes a conductive gang with gang legs electrically coupling a second component stacked over a first die to a package substrate. The first die is mounted over a die attach region of the package substrate and electrically coupled to the package substrate.
Public/Granted literature
- US20210035891A1 SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES Public/Granted day:2021-02-04
Information query
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