Invention Grant
- Patent Title: Prepreg, substrate, metal-clad laminate, semiconductor package, and printed circuit board
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Application No.: US16954020Application Date: 2018-12-04
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Publication No.: US11234329B2Publication Date: 2022-01-25
- Inventor: Rihoko Watanabe , Keiko Kashihara , Hiroharu Inoue
- Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Applicant Address: JP Osaka
- Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will and Emery LLP
- Priority: JPJP2017-244720 20171221
- International Application: PCT/JP2018/044616 WO 20181204
- International Announcement: WO2019/124062 WO 20190627
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H05K1/03 ; H01L23/12 ; H01L23/31 ; H01L23/00

Abstract:
A prepreg is used to fabricate a semiconductor package including a chip and a substrate to mount the chip thereon. The prepreg is in a semi-cured state. The substrate includes a cured product of the prepreg. The chip has: a first chip surface located opposite from the substrate; and a second chip surface located opposite from the first chip surface. The prepreg satisfies the relational expression: 0.9≤X2/X1≤1.0 (I), where X1 is a coefficient of thermal expansion of the first chip surface of the chip before the chip is mounted on the substrate, and X2 is a coefficient of thermal expansion of the first chip surface of the chip after the chip has been mounted on the substrate.
Public/Granted literature
- US20210092835A1 PREPREG, SUBSTRATE, METAL-CLAD LAMINATE, SEMICONDUCTOR PACKAGE, AND PRINTED CIRCUIT BOARD Public/Granted day:2021-03-25
Information query
IPC分类: