A processing device receives a request to perform an erase operation on a memory device. The processing device executes a portion of the erase operation during a first time period. The processing device further executes an erase suspend operation to suspend the erase operation during the first time period. Responsive to detecting a completion of the erase suspend operation, the processing device receives one or more commands directed to the memory device. The processing device also executes the one or more commands during a second time period. Responsive to the expiration of the second time period, the processing device executes an erase resume operation to resume the erase operation on the memory device.