- 专利标题: Semiconductor device and method of forming encapsulated wafer level chip scale package (eWLCSP)
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申请号: US16558135申请日: 2019-09-01
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公开(公告)号: US11257729B2公开(公告)日: 2022-02-22
- 发明人: Thomas J. Strothmann , Seung Wook Yoon , Yaojian Lin
- 申请人: JCET Semiconductor (Shaoxing) Co., Ltd.
- 申请人地址: CN Shaoxing
- 专利权人: JCET Semiconductor (Shaoxing) Co., Ltd.
- 当前专利权人: JCET Semiconductor (Shaoxing) Co., Ltd.
- 当前专利权人地址: CN Shaoxing
- 代理机构: Patent Law Group: Atkins and Associates, P.C.
- 代理商 Robert D. Atkins
- 主分类号: H01L23/31
- IPC分类号: H01L23/31 ; H01L23/00 ; H01L21/56
摘要:
A semiconductor device has a semiconductor die and an encapsulant around the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The fan-in interconnect structure includes an insulating layer and a conductive layer formed over the semiconductor die. The conductive layer remains within a footprint of the semiconductor die. A portion of encapsulant is removed from over the semiconductor die. A backside protection layer is formed over a non-active surface of the semiconductor die after depositing the encapsulant. The backside protection layer is formed by screen printing or lamination. The backside protection layer includes an opaque, transparent, or translucent material. The backside protection layer is marked for alignment using a laser. A reconstituted panel including the semiconductor die is singulated through the encapsulant to leave encapsulant disposed over a sidewall of the semiconductor die.
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