Compact offset drift trim implementation
Abstract:
Disclosed embodiments include a method for reducing amplifier offset drift comprised of receiving a first differential input signal at a first transistor base terminal and a second differential input signal at a second transistor base terminal, coupling the collector of the first transistor to the emitter of a third transistor and the emitter of the second transistor to the emitter of a fourth transistor, then coupling the base of the third transistor to the base of the fourth transistor. The method is also comprised of coupling the collector of the fourth transistor to an output terminal, generating a temperature dependent error correction current to minimize the difference in the amount of current flowing through the third transistor and the amount of current flowing through the fourth transistor, then injecting the error correction current into the emitter terminal of at least one of either the third transistor or the fourth transistor.
Public/Granted literature
Information query
Patent Agency Ranking
0/0