Invention Grant
- Patent Title: Base station apparatus, terminal apparatus, communication method, and integrated circuit with cyclic redundancy check parity bits attachment
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Application No.: US16314807Application Date: 2017-07-07
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Publication No.: US11265107B2Publication Date: 2022-03-01
- Inventor: Kazunari Yokomakura , Shohei Yamada , Hidekazu Tsuboi , Hiroki Takahashi , Tatsushi Aiba
- Applicant: SHARP KABUSHIKI KAISHA , FG INNOVATION COMPANY LIMITED
- Applicant Address: JP Sakai; HK Tuen Mun
- Assignee: SHARP KABUSHIKI KAISHA,FG INNOVATION COMPANY LIMITED
- Current Assignee: SHARP KABUSHIKI KAISHA,FG INNOVATION COMPANY LIMITED
- Current Assignee Address: JP Sakai; HK Tuen Mun
- Agency: ScienBiziP, P.C.
- Priority: JPJP2016-135742 20160708
- International Application: PCT/JP2017/024968 WO 20170707
- International Announcement: WO2018/008744 WO 20180111
- Main IPC: H04L1/00
- IPC: H04L1/00 ; H03M13/27 ; H03M13/29 ; H04L27/26 ; H04L29/08 ; H04W28/06 ; H03M13/00 ; H04L69/324

Abstract:
Channel encoding is provided that includes applying turbo coding with a coding rate of 1/5 to an input bit sequence, applying a subblock interleaver to each of first to fifth code bit sequences to which the turbo coding is applied, applying bit collection to the first to fifth code bit sequences output from the subblock interleaver, the bit collection outputting the first code bit sequence in order, outputting the second code bit sequence and the fourth code bit sequence alternately on a bit-by-bit basis after the first code bit sequence, and outputting the second code bit sequence and the fifth code bit sequence alternately on a bit-by-bit basis.
Public/Granted literature
- US20190312678A1 BASE STATION APPARATUS, TERMINAL APPARATUS, COMMUNICATION METHOD, AND INTEGRATED CIRCUIT Public/Granted day:2019-10-10
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