A lock detection circuit is configured to include an integrating circuit that integrates a phase difference between a frequency-divided signal of a VCO and a reference signal during a constant period within a transient response period for an output signal from the VCO, and integrates a phase difference between the frequency-divided signal and the reference signal during a constant period within a convergence period for the output signal from the VCO; and a degree-of-convergence calculating circuit that calculates a degree at which the output signal from the VCO has converged, from a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the transient response period and a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the convergence period.