Invention Grant
- Patent Title: Efficient analog in-memory matrix multiplication processor
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Application No.: US16175229Application Date: 2018-10-30
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Publication No.: US11294985B2Publication Date: 2022-04-05
- Inventor: Amrita Mathuriya , Sasikanth Manipatruni , Dmitri Nikonov , Ian Young , Ram Krishnamurthy
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: G06F17/16
- IPC: G06F17/16 ; G11C7/12 ; G06N3/063

Abstract:
Techniques are provided for efficient matrix multiplication using in-memory analog parallel processing, with applications for neural networks and artificial intelligence processors. A methodology implementing the techniques according to an embodiment includes storing two matrices in-memory. The first matrix is stored in transposed form such that the transposed first matrix has the same number of rows as the second matrix. The method further includes reading columns of the matrices from the memory in parallel, using disclosed bit line functional read operations and cross bit line functional read operations, which are employed to generate analog dot products between the columns. Each of the dot products corresponds to an element of the matrix multiplication product of the two matrices. In some embodiments, one of the matrices may be used to store neural network weighting factors, and the other matrix may be used to store input data to be processed by the neural network.
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