Invention Grant
- Patent Title: Embedded component package structure and manufacturing method thereof
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Application No.: US16397530Application Date: 2019-04-29
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Publication No.: US11296030B2Publication Date: 2022-04-05
- Inventor: Yu-Ju Liao , Chien-Fan Chen , Chien-Hao Wang
- Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H05K3/46
- IPC: H05K3/46 ; H01L23/538 ; H01L21/48

Abstract:
An embedded component package structure including a dielectric structure, a semiconductor chip, a first polymer layer, and a patterned conductive layer is provided. The semiconductor chip is embedded in the dielectric structure. The first polymer layer covers the semiconductor chip and has a first thickness, and the first thickness is greater than a second thickness of the dielectric structure above the first polymer layer. The patterned conductive layer covers an upper surface of the dielectric structure and extends over the first polymer layer, and the patterned conductive layer is electrically connected to the semiconductor chip.
Public/Granted literature
- US20200343187A1 EMBEDDED COMPONENT PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-10-29
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