Invention Grant
- Patent Title: Semiconductor device including a package substrate and a semiconductor chip
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Application No.: US16930106Application Date: 2020-07-15
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Publication No.: US11335571B2Publication Date: 2022-05-17
- Inventor: Hideaki Tsuchiya , Akira Matsumoto
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/498 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor device includes a package substrate, a semiconductor chip and a solder bump. The semiconductor chip is disposed on the package substrate. The package substrate includes a first electrode pad, and a first insulating film formed such that the first insulating film exposes a first portion of a surface of the first electrode pad. The semiconductor chip includes a second electrode pad and a second insulating film formed such that the second insulating film exposes a second portion of a surface of the second electrode pad. The second electrode pad is formed on the first electrode pad through the solder bump. L2/L1 is 0.63 or more in a cross section passing through the first electrode pad, the solder bump and the second electrode pad. A first length of the first portion and a second length of the second portion are defined as L1 and L2, respectively.
Public/Granted literature
- US20220020604A1 SEMICONDUCTOR DEVICE Public/Granted day:2022-01-20
Information query
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