Invention Grant
- Patent Title: Fully self-aligned interconnect structure
-
Application No.: US16895338Application Date: 2020-06-08
-
Publication No.: US11361994B2Publication Date: 2022-06-14
- Inventor: Hsin-Ping Chen , Shau-Lin Shue , Min Cao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/3213 ; H01L23/528 ; H01L23/522

Abstract:
The present disclosure provides a method of forming a semiconductor structure. The method includes providing a semiconductor substrate and forming a patterned metal structure on the semiconductor substrate, wherein the patterned metal structure includes a first metal layer and a second metal layer deposited in a single deposition step. The method further includes etching a portion of the second metal layer thereby forming a metal plug in the second metal layer, the first metal layer of the patterned metal structure having a first metal feature underlying and contacting the metal plug.
Public/Granted literature
- US20210384074A1 Fully Self-Aligned Interconnect Structure Public/Granted day:2021-12-09
Information query
IPC分类: