Invention Grant
- Patent Title: Enabling of functional logic in IC using thermal sequence enabling test
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Application No.: US16527146Application Date: 2019-07-31
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Publication No.: US11366154B2Publication Date: 2022-06-21
- Inventor: Sebastian T. Ventrone , Richard S. Graf , Ezra D. B. Hall , Jack R. Smith
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Hoffman Warnick LLC
- Agent David Cain
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/28 ; H04L9/32

Abstract:
An integrated circuit (IC) includes functional logic therein that can be enabled by application of a predefined thermal cycle. The IC includes an enabling fuse operatively coupled to the functional logic, the functional logic being disabled unless enabled by activation of the enabling fuse. A set of thermal sensors are arranged in a physically distributed manner through at least a portion of the IC. A test control macro operatively couples to the set of thermal sensors and the enabling fuse for activating the enabling fuse to enable the functional logic in response to application of a thermal cycle that causes the set of thermal sensors to sequentially experience a thermal condition matching a thermal sequence enabling test. A related method and system for applying the predefined thermal cycle are also provided.
Public/Granted literature
- US20210033660A1 ENABLING OF FUNCTIONAL LOGIC IN IC USING THERMAL SEQUENCE ENABLING TEST Public/Granted day:2021-02-04
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