Invention Grant
- Patent Title: Signaling between master and one or more slave components to share absolute and incremental data
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Application No.: US16952215Application Date: 2020-11-19
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Publication No.: US11368533B2Publication Date: 2022-06-21
- Inventor: Nevenka Kozomora , Andrea Foletto , Emanuele Andrea Casu
- Applicant: Allegro MicroSystems, LLC
- Applicant Address: US NH Manchester
- Assignee: Allegro MicroSystems, LLC
- Current Assignee: Allegro MicroSystems, LLC
- Current Assignee Address: US NH Manchester
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: H04L67/12
- IPC: H04L67/12 ; H04L1/00 ; H04L43/0811 ; G07C5/00
Abstract:
In one aspect, a system includes an electronic control unit (ECU) and an integrated circuit (IC). The IC is configured to transmit, to the ECU, absolute data on a message line at a first rate; and transmit, to the ECU, incremental data on an index line at a second rate. The second rate is faster than the first rate and the incremental data includes data associated with changes in the absolute data.
Public/Granted literature
- US20220159073A1 SIGNALING BETWEEN MASTER AND ONE OR MORE SLAVE COMPONENTS TO SHARE ABSOLUTE AND INCREMENTAL DATA Public/Granted day:2022-05-19
Information query
