Invention Grant
- Patent Title: Top gate thin film transistor, fabricating method thereof, array substrate and display apparatus
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Application No.: US16638283Application Date: 2019-08-07
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Publication No.: US11380796B2Publication Date: 2022-07-05
- Inventor: Tongshang Su , Dongfang Wang , Jun Liu , Guangyao Li , Wei Li , Qinghe Wang , Chao Wang , Tao Sun
- Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Anhui; CN Beijing
- Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Anhui; CN Beijing
- Agency: WHDA, LLP
- Priority: CN201811583504.5 20181224
- International Application: PCT/CN2019/099659 WO 20190807
- International Announcement: WO2020/134098 WO 20200702
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/12 ; H01L29/417 ; H01L29/66 ; H01L27/32

Abstract:
The disclosure relates to a thin film transistor. The thin film transistor may include a substrate, an active layer on the substrate, a gate on the active layer, and a source and a drain. The active layer may include a first conducting region, a second conducting region, and a channel region between the first conducting region and the second conducting region. An orthographic projection of the source and an orthographic projection of the drain on the substrate may cover at least an orthographic projection of a first conducting region and an orthographic projection of a second conducting region on the substrate.
Public/Granted literature
- US20200251596A1 TOP GATE THIN FILM TRANSISTOR, FABRICATING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY APPARATUS Public/Granted day:2020-08-06
Information query
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