- 专利标题: Integrated circuits with backside power rails
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申请号: US17093303申请日: 2020-11-09
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公开(公告)号: US11387181B2公开(公告)日: 2022-07-12
- 发明人: Chih-Chao Chou , Kuo-Cheng Chiang , Shi Ning Ju , Wen-Ting Lan , Chih-Hao Wang
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L23/50
- IPC分类号: H01L23/50 ; H01L29/78 ; H01L27/088
摘要:
Semiconductor devices and methods are provided. A method according to the present disclosure includes receiving a substrate that includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; forming a plurality of fins over the third semiconductor layer; forming a trench between two of the plurality of fins; depositing a dummy material in the trench; forming a gate structure over channel regions of the plurality of the fins; forming source/drain features over source/drain regions of the plurality of the fins; bonding the substrate on a carrier wafer; removing the first and second semiconductor layers to expose the dummy material; removing the dummy material in the trench; depositing a conductive material in the trench; and bonding the substrate to a silicon substrate such that the conductive material is in contact with the silicon substrate. The trench extends through the third semiconductor layer and has a bottom surface on the second semiconductor layer.
公开/授权文献
- US20210057325A1 Integrated Circuits with Backside Power Rails 公开/授权日:2021-02-25
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