Techniques regarding microfluidic chips with one or more vias filled with sacrificial plugs and/or manufacturing methods thereof are provided herein. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a silicon device layer of a microfluidic chip comprising a plurality of vias extending through the silicon device layer. The plurality of vias comprise greater than or equal to about 100 vias per square centimeter of a surface of the silicon device layer and less than or equal to about 100,000 vias per square centimeter of the surface of the silicon device layer. Additionally, the apparatus can comprise a plurality of sacrificial plugs positioned in the plurality of vias.