- Patent Title: Memory scanning operation in response to common mode fault signal
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Application No.: US17261217Application Date: 2019-06-06
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Publication No.: US11494256B2Publication Date: 2022-11-08
- Inventor: Milosch Meriac , Emre Özer , Xabier Iturbe , Balaji Venu , Shidhartha Das
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Priority: GB1811795 20180719
- International Application: PCT/GB2019/051570 WO 20190606
- International Announcement: WO2020/016550 WO 20200123
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/16 ; G06F11/20 ; G06F11/30

Abstract:
An apparatus comprises a plurality of redundant processing units to perform data processing redundantly in lockstep; common mode fault detection circuitry to detect an event indicative of a potential common mode fault affecting each of the plurality of redundant processing units; a memory shared between the plurality of redundant processing units; and memory checking circuitry to perform a memory scanning operation to scan at least part of the memory for errors; in which the memory checking circuitry performs the memory scanning operation in response to a common mode fault signal generated by the common mode fault detection circuitry indicating that the event indicative of a potential common mode fault has been detected.
Public/Granted literature
- US20210279124A1 MEMORY SCANNING OPERATION IN RESPONSE TO COMMON MODE FAULT SIGNAL Public/Granted day:2021-09-09
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