Invention Grant
- Patent Title: Biasing circuitry
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Application No.: US17140754Application Date: 2021-01-04
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Publication No.: US11500404B2Publication Date: 2022-11-15
- Inventor: John B. Bowlerwell , Andrew J. Howlett , Graeme S. Angus , Andrei Dumitriu
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Applicant Address: GB Edinburgh
- Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee: Cirrus Logic International Semiconductor Ltd.
- Current Assignee Address: GB Edinburgh
- Agency: Jackson Walker L.L.P.
- Priority: GB2001973 20200213
- Main IPC: G05F1/563
- IPC: G05F1/563 ; G05F1/575 ; G05F1/62 ; H03K17/00 ; H04R3/00

Abstract:
The present disclosure relates to circuitry for selecting a bias voltage to output at a bias voltage output node of the circuitry. The circuitry comprises a first circuit node configured to receive a first voltage from a first, unregulated, voltage source and a second circuit node configured to receive a second voltage from a second, regulated, voltage source. A switch arrangement configured to selectively couple the bias voltage output node to the first circuit node or the second circuit node is also provided.
Public/Granted literature
- US20210232165A1 BIASING CIRCUITRY Public/Granted day:2021-07-29
Information query
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