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公开(公告)号:US11500404B2
公开(公告)日:2022-11-15
申请号:US17140754
申请日:2021-01-04
Inventor: John B. Bowlerwell , Andrew J. Howlett , Graeme S. Angus , Andrei Dumitriu
Abstract: The present disclosure relates to circuitry for selecting a bias voltage to output at a bias voltage output node of the circuitry. The circuitry comprises a first circuit node configured to receive a first voltage from a first, unregulated, voltage source and a second circuit node configured to receive a second voltage from a second, regulated, voltage source. A switch arrangement configured to selectively couple the bias voltage output node to the first circuit node or the second circuit node is also provided.
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公开(公告)号:US11843354B2
公开(公告)日:2023-12-12
申请号:US17346767
申请日:2021-06-14
Inventor: Pradeep Saminathan , Graeme S. Angus , John B. Bowlerwell
CPC classification number: H03F1/52 , H02M1/32 , H03F1/56 , H03F2200/03 , H03F2200/102 , H03F2200/171
Abstract: The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.
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