Invention Grant
- Patent Title: Method and device for clock generation and synchronization for time interleaved networks
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Application No.: US17504850Application Date: 2021-10-19
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Publication No.: US11507129B2Publication Date: 2022-11-22
- Inventor: Ray Luan Nguyen , Geoffrey O. Hatcher
- Applicant: MARVELL ASIA PTE, LTD.
- Applicant Address: SG Singapore
- Assignee: MARVELL ASIA PTE, LTD.
- Current Assignee: MARVELL ASIA PTE, LTD.
- Current Assignee Address: SG Singapore
- Main IPC: G06F1/08
- IPC: G06F1/08 ; G06F1/06

Abstract:
A multi-layer time-interleaving (TI) device and method of operation therefor. This device includes a plurality of TI layers configured to receive a plurality of input clock signals and to output a plurality of output clock signals, each of which can be configured to drive subsequent devices. The layers include at least a first and second layer including a fine-grain propagation device and a barrel-shifting propagation device configured to retime the plurality of input clock signals to produce divided output clock signals. The device can include additional barrel-shifting propagation devices to time interleave an initial two layers to produce one or more additional layers. Using negative phase stepping, the plurality of output clock signals is produced with optimal timing margin and synchronized on a single clock edge.
Public/Granted literature
- US20220155813A1 METHOD AND DEVICE FOR CLOCK GENERATION AND SYNCHRONIZATION FOR TIME INTERLEAVED NETWORKS Public/Granted day:2022-05-19
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