Invention Grant
- Patent Title: Stiffener for die crack prevention in semiconductor packages
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Application No.: US17088666Application Date: 2020-11-04
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Publication No.: US11521940B2Publication Date: 2022-12-06
- Inventor: Eng Kwong Lee , Chew Ching Lim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Viering, Jentschura & Partner mbB
- Priority: MYPI2020004462 20200828
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/16 ; H01L23/367 ; H01L23/427 ; H01L21/48

Abstract:
The present disclosure relates to a semiconductor package that may include a substrate, at least one die coupled to the substrate, and a stiffener coupled to the substrate, wherein the stiffener may include a stiffener frame, wherein the stiffener frame at least partially surrounds the at least one die. The stiffener may include at least one resilient member extending from the stiffener frame towards the at least one die, and the at least one resilient member may include a distal end that extends at a height above the substrate.
Public/Granted literature
- US20220068842A1 STIFFENER FOR DIE CRACK PREVENTION IN SEMICONDUCTOR PACKAGES Public/Granted day:2022-03-03
Information query
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