Integrated circuit device, system-on-chip including the same, and packet processing method
Abstract:
A system-on-chip includes a first intellectual property (IP) generating a plurality of request packets; and a second IP generating a plurality of response packets based on the plurality of request packets, wherein the second IP includes a plurality of processing elements processing the plurality of request packets and generating the plurality of response packets; a distributer, when the plurality of request packets are input from the first IP, determining a scheduling policy based on a packet type of the plurality of request packets and distributing the plurality of request packets to the plurality of processing elements according to the determined scheduling policy; and an aggregator, when the plurality of response packets are received from each of the plurality of processing elements, aggregating the plurality of response packets according to the determined scheduling policy.
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