Invention Grant
- Patent Title: Stacked semiconductor dies for semiconductor device assemblies
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Application No.: US17190324Application Date: 2021-03-02
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Publication No.: US11532595B2Publication Date: 2022-12-20
- Inventor: Jungbae Lee
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/00

Abstract:
Stacked semiconductor dies for semiconductor device assemblies and associated methods and systems are disclosed. In some embodiments, the semiconductor die assembly includes a substrate with an opening extending therethrough. The assembly can include a stack of semiconductor dies attached to the substrate. The stack includes a first die attached to a front surface of the substrate, where the first die includes a first bond pad aligned with the opening. The stack also includes a second die attached to the first die such that an edge of the second die extends past a corresponding edge of the first die. The second die includes a second bond pad uncovered by the first die and aligned with the opening. A bond wire formed through the opening couples the first and second bond pads with a substrate bond pad on a back surface of the substrate.
Public/Granted literature
- US20220285315A1 STACKED SEMICONDUCTOR DIES FOR SEMICONDUCTOR DEVICE ASSEMBLIES Public/Granted day:2022-09-08
Information query
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