An array substrate and a display panel are provided. The array substrate includes a plurality of sub-pixels, and each sub-pixel includes four thin film transistors. The array substrate further includes a gate line, a data line, and a divided voltage line. In the present invention, a channel aspect ratio of second thin film transistor is greater than a channel aspect ratio of the first thin film transistor and a channel aspect ratio of third thin film transistor, and a drain of a fourth thin film transistor is electrically connected to the divided voltage line, such that the display panel has a wider viewing angle.