Invention Grant
- Patent Title: Read and verify methodology and structure to counter gate SiO2 dependence of non-volatile memory cells
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Application No.: US17091834Application Date: 2020-11-06
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Publication No.: US11551768B2Publication Date: 2023-01-10
- Inventor: Rajdeep Gautam , Akira Okada
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Dickinson Wright PLLC
- Agent Steven C. Hurles
- Main IPC: G11C16/30
- IPC: G11C16/30 ; G11C16/34 ; G11C16/26 ; G11C16/20

Abstract:
A method for programming a target memory cell in a memory array of a non-volatile memory system, the method comprising defining a default read biasing voltage value and a default verify biasing voltage value for each program state of a target memory cell of a memory structure, determining a location of a target memory cell within the memory structure and, based upon the determined location of the target memory cell, applying a first incremental offset voltage to the default read biasing voltage value with respect to each program state, and applying a second incremental offset voltage to the default verify biasing voltage value with respect to each program state.
Public/Granted literature
- US20220148665A1 READ AND VERIFY METHODOLOGY AND STRUCTURE TO COUNTER GATE SiO2 DEPENDENCE OF NON VOLATILE MEMORY CELLS Public/Granted day:2022-05-12
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