Invention Grant
- Patent Title: Nonvolatile memory device with vertical string including semiconductor and resistance change layers, and method of operating the same
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Application No.: US17385263Application Date: 2021-07-26
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Publication No.: US11574677B2Publication Date: 2023-02-07
- Inventor: Jungho Yoon , Cheol Seong Hwang , Soichiro Mizusaki , Youngjin Cho
- Applicant: Samsung Electronics Co., Ltd. , SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
- Applicant Address: KR Suwon-si; KR Seoul
- Assignee: Samsung Electronics Co., Ltd.,SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
- Current Assignee: Samsung Electronics Co., Ltd.,SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
- Current Assignee Address: KR Suwon-si; KR Seoul
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2019-0093430 20190731
- Main IPC: G11C7/22
- IPC: G11C7/22 ; G11C13/00 ; H01L27/24 ; H01L45/00

Abstract:
A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
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