Three-dimensional (3D) NAND memory devices and methods are provided. In one aspect, a fabrication method includes depositing a cover layer over a substrate, depositing a layer stack over the cover layer, performing a first epitaxial growth to deposit a first epitaxial layer on a side portion of a channel layer that extends through the layer stack, removing the cover layer to expose a portion of the substrate, performing a second epitaxial growth to deposit a second epitaxial layer on the portion of the substrate, and performing a third epitaxial growth to deposit a third epitaxial layer on the second epitaxial layer. The second and third epitaxial layers are configured to provide separate electrical current paths for an erase operation and a read operation.