Invention Grant
- Patent Title: Systems and methods for systolic array design from a high-level program
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Application No.: US17096742Application Date: 2020-11-12
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Publication No.: US11604758B2Publication Date: 2023-03-14
- Inventor: Peng Zhang , Cody Hao Yu , Xuechao Wei , Peichen Pan
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Stevens Law Group
- Agent David R. Stevens
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F15/80 ; G06N3/08 ; G06N3/04 ; G06N3/063

Abstract:
Systems and methods for automated systolic array design from a high-level program are disclosed. One implementation of a systolic array design supporting a convolutional neural network includes a two-dimensional array of reconfigurable processing elements arranged in rows and columns. Each processing element has an associated SIMD vector and is connected through a local connection to at least one other processing element. An input feature map buffer having a double buffer is configured to store input feature maps, and an interconnect system is configured to pass data to neighboring processing elements in accordance with a processing element scheduler. A CNN computation is mapped onto the two-dimensional array of reconfigurable processing elements using an automated system configured to determine suitable reconfigurable processing element parameters.
Public/Granted literature
- US20210081354A1 Systems And Methods For Systolic Array Design From A High-Level Program Public/Granted day:2021-03-18
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